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About the Team:

Born at X, Google's Moonshot Factory, Taara is on a mission to connect billions of people lacking abundant and affordable internet today by pioneering the way we use light to deliver faster, cheaper, more reliable connectivity. Lead the charge in bringing our groundbreaking wireless optical communication and photonics chip technologies to the world. Drive our growth story as we scale innovative solutions across the world. Join us to light the way for bridging the digital divide and illuminating the future.

About the role:

Our team is seeking a hands-on Hardware Reliability Engineer to drive the reliability and robustness of our next generation Wireless Optical Communication (WOC) system and hardware components. You'll lead reliability testing, failure analysis, and design optimization for our electrical, optical and photonic systems. You’ll be responsible for identifying test and qualification procedures for in-house designed components and systems to ensure manufacturing yield and long-term field performance. The scope will span the complete technology stack from semiconductor wafers, dies, photonic integrated circuits (PICs) and packaged assemblies to full communication systems. Working within a multidisciplinary engineering leadership team you'll collaborate closely with photonics, optics, manufacturing, product management, manufacturing and operations teams.

The ideal candidate will have experience in modeling, guiding, testing, and validating production-ready semiconductor, photonic and III-V devices. The position seeks highly-motivated individuals that enjoy working in a small dynamic results-oriented team environment, with a passion for solving challenging problems that can lead to high-impact advances in technology. This is a hands-on, technical leadership position where you will explore, pathfind and define key reliability elements for our next generation Wireless Optical Communication (WOC) architecture options and sustainability of the current generation.

How you will make 10x impact:

• Drive key decisions on reliability architecture and testing protocols from die, package, module and assembled communication system based on first principles understanding and modeling.

• Lead failure analysis, reliability modeling and drive corrective action

• Determine criteria and implement die level and package level stress testing

• Model and define requirements for electrical, mechanical, optical and system environmental reliability testing. Manage and track reliability risks and lead implementation of the testing and validation.

• Develop and analyze die, optical, mechanical and photonic components to predict long-term performance under field conditions.

What you should have:

• MS in Electrical Engineering, Materials Science, Physics or similar discipline, with 8+ years of industry experience.

• Strong cross-functional leadership, team management, execution, influencing skills and executive summary communication skills.

• Proficiency and demonstrated experience with physics-based reliability modeling, hybrid reliability modeling, and statistical reliability modeling, as well as establishment of physics of failure models.

• Proficiency and demonstrated experience with reliability testing methodologies for semiconductor devices, packaged assemblies and outdoor hardware.

• Experience with reliability modeling and testing of semiconductor and active photonic devices such as lasers, semiconductor optical amplifiers, and photodetectors

It'd be great if you also had these:

• PhD in Electrical Engineering, Materials Science, Physics or similar discipline, with 5+ years of industry experience.

• Familiarity with photonic integrated circuit (PIC) design and packaging processes, including silicon photonics and III-V semiconductor platforms

• Experience with wafer fab processes, and failure analysis techniques including SEM and optical microscopy.

• Knowledge of advanced semiconductor packaging techniques including 2.5D, 3D chip integration, and printed circuit boards.

• Familiarity with wireless telecommunication hardware reliability and test standards

• Thermal modeling and design including peltier coolers and FEA analysis

The US base salary range for this full-time position is $160,000 - $210,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your location during the hiring process.