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About Neurophos

We are developing an ultra-high-performance, energy-efficient photonic AI inference system. We’re transforming AI computation with the first-ever metamaterial-based optical processing unit (OPU).

As AI adoption accelerates, data centers face significant power and scalability challenges. Traditional solutions are struggling to keep up, leading to rapidly rising energy consumption and costs. We’re solving both problems with an OPU that integrates over one million micron-scale optical processing components on a single chip. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving large-scale AI inference performance.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years.

Join us and shape the future of optical computing!

Location: San Francisco Bay Area or Austin, TX. Full-time onsite position.

Position Overview

We are seeking an experienced Lead for Performance and Power Analysis (PPA) to establish and drive our modeling infrastructure for performance characterization and power/energy optimization. This leadership role combines deep technical expertise in hardware modeling with team leadership responsibilities. You will build the PPA modeling team, define methodologies for performance and power simulation, and drive critical architectural decisions through data-driven analysis of our novel optical computing platform.

Key Responsibilities

• Lead the PPA modeling team (4+ engineers) focused on performance and power analysis
• Architect and implement performance models with discrete-event timing and cycle-accurate simulation
• Develop power and energy modeling frameworks for optical engines, SRAM arrays, and digital logic
• Define PPA analysis methodologies and establish modeling best practices
• Drive performance optimization through bottleneck identification and architectural trade-off analysis
• Collaborate with the architecture team on the performance characterization of novel compute blocks
• Build and maintain a trace-driven simulation infrastructure for independent performance analysis
• Develop power models for optical components, photonic devices, and opto-electronic interfaces
• Work with silicon design teams to validate models against RTL and post-layout results
• Mentor modeling engineers and establish team development practices
• Present PPA results to the executive team and drive architecture decisions
  
  

Qualifications

• MS or PhD in Computer Engineering, Electrical Engineering, or Computer Science (or BS with equivalent experience)
• 10+ years of experience in performance modeling and power analysis for CPUs, GPUs, or accelerators
• Proven experience building and leading technical teams (3+ years of management experience)
• Deep expertise in discrete-event simulation, cycle-accurate modeling, and performance analysis
• Strong background in power modeling frameworks (McPAT, Cacti, or custom methodologies)
• Expert-level C++ programming with a focus on performance-critical simulation code
• Experience with trace-driven simulation and performance bottleneck analysis
• Track record of shipping performance models that drove silicon design decisions
• Excellent communication skills and ability to present technical results to diverse audiences
• Experience with performance characterization of ML workloads on specialized hardware
  
  

Preferred Skills

• Experience with GPU performance modeling or shader core analysis
• Background in accelerator architectures (TPU, NPU, DSP) or domain-specific processors
• Knowledge of memory system modeling (HBM, DRAM controllers, cache hierarchies)
• Familiarity with optical computing, photonics, or analog computing paradigms
• Experience with event-driven simulation frameworks (SystemC, gem5, SST)
• Understanding of ML framework internals (PyTorch, TensorFlow) and workload characteristics
• Background in statistical performance modeling and regression analysis
• Experience with power optimization techniques for datacenter processors
• Publication record in computer architecture or hardware modeling venues
  
  

What We Offer

• A pivotal role in an innovative startup redefining the future of AI hardware.
• A collaborative and intellectually stimulating work environment.
• Competitive compensation, including salary and equity options.
• Good benefits - health, vision, dental, 401 (k), etc.
• Opportunities for career growth and future team leadership.
• Access to cutting-edge technology and state-of-the-art facilities.
• Opportunity to publish research and contribute to the field of efficient AI inference.
  
  

This is a rare opportunity to work on a game-changing technology at the intersection of photonics and AI. As part of our elite team, you’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Be a key player in bringing this transformative innovation to the world.