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Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

To support Physical Design and methodology related activities for multiple 32-bit business units in Microchip. The product's focus is on microprocessors, microcontrollers, and wireless design and implementation.

• Develop and support physical design methodologies and flows across projects
• Proficient in automation using tcl, shell and other scripting languages
• Implement all aspects of physical design from netlist to GDSII: floor planning, placement optimization, low power techniques, clock tree synthesis, routing, crosstalk avoidance, and physical verification
• Expertise in design environment setup/maintenance, revision control systems for physical design
• Utilize hierarchical systems-level design techniques to develop flows for designs exceeding multi-million gates
• Must be a self-motivated team player who can collaborate with multi-functional teams across a geographically diverse company to achieve desired goals
• Interfacing with external vendors and IP sources to resolve problems

Requirements/Qualifications:

• Masters/Bachelor’s Degree in Electrical / Electronics Engineering.
• Minimum of 12 years or more applicable technical experience in the physical and timing-related aspects of IC design.
• Detailed knowledge of one or more of the following tools: Innovus, ICC/ICC2, Redhawk and Calibre
• Excellent debugging and analytical skills
• Good verbal and written communication skills and strong interpersonal skills
• Working with multi-functional teams and external EDA vendors to solve tool/flow issues

The design task requires experience in the following Physical Design-related activities:

• Advanced knowledge of VLSI logic principles, clock tree synthesis & debug, and design timing closure
• Advanced knowledge of place and route methodologies and low power methodologies
• Experience with 40nm or 28nm technologies is required
• Multi-voltage/low power implementation and verification techniques
• Power network planning
• Power integrity and reliability (EM & IR) analysis

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