At UNIVITY we believe that everyone on Earth should have access to internet connectivity, and we are on a mission to empower telecom operators to deliver high-performance, affordable, sustainable internet from space to their clients where terrestrial networks are not available.

We will launch our first mission in 2025. This Early Test is dedicated to validating the core technology that will enable broadband internet transmission from space. The Early Test will pave the way for our next major milestone: an in-orbit demonstration in late 2026, where two complete satellites will be deployed to further validate the system end-to-end. The following step will be to deploy our full constellation of disruptive satellites, enabling telecom operators to provide seamless connectivity worldwide.

Our project is rapidly ramping up, and we are looking to expand our team with passionate individuals who share our vision.

UNVITY was created in 2022 and has offices in Toulouse and Paris. We offer exceptional learning and career development opportunities, as well as competitive salaries and benefits.

UNIVITY is looking for a Senior FPGA Development Engineer to join the team in our Toulouse office. Reporting to the Senior 5G Software Architect, you will have a central role in the development of our innovative 5G SATCOM connectivity solutions.

Your key responsibilities and tasks:

SoC/FPGA Design and Development:

• Analyse the functional and technical specifications of the projects.
• Develop and simulate adapted SoC/FPGA architectures, optimizing them in terms of performance, robustness and energy consumption
• Write, test, and optimize code using hardware description languages such as VHDL/Verilog and Vitis HLS.
• Implement and optimize logic functions for real-time signal acquisition and processing.

Validation and integration:

• Design and execute test plans to validate the operation of FPGAs, in simulation and on test benches.
• Integrate FPGAs with circuit boards and validate them in simulated and real-world environments.
• Debug FPGA designs and ensure they conform to specifications.

Prototype and validate performance in a context of specific environmental constraints.

Skills and experience

• A minimum bachelor’s degree in digital microelectronics engineering or equivalent,
• At least 10 years of experience in SoC/FPGA design.

• Good knowledge of FPGA design, SoC, and simulation techniques.
• Previous experience with a Zynq and/or Versal architecture is a strong advantage
• Experience with telecommunications (5G DVB) is a strong advantage

• Proficient in languages such as VHDL, Verilog and System Verilog, C, System C & C++
• Excellent written and oral communication skills in French and English.

• Team player with excellent interpersonal skills.

People come in different shapes and sizes and it is difficult to write a job description for someone we have not yet met. Therefore if you are not sure that you meet all the criteria, or if you think that you may have something different to offer, we still want to hear from you.

Département

Engineering

Locations

Toulouse

Remote status

Hybrid